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specifications of any and all sanyo semiconductor co.,l td. products described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customer ' s products or equipment. to verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer ' sproductsor equipment. any and all sanyo semiconductor co.,ltd. products described or contained herein are, with regard to "standard application", intended for the use as general el ectronics equipment (home appliances, av equipment, communication device, office equipment, industrial equ ipment etc.). the products mentioned herein shall not be intended for use for any "special application" (medica l equipment whose purpose is to sustain life, aerospace instrument, nuclear control device, burning appliances, t ransportation machine, traffic signal system, safety equipment etc.) that shall require extremely high level of re liability and can directly threaten human lives in case of failure or malfunction of the product or may cause har m to human bodies, nor shall they grant any guarantee thereof. if you should intend to use our products for app lications outside the standard applications of our customer who is considering such use and/or outside the scope of our intended standard applications, please consult with us prior to the intended use. if there is n o consultation or inquiry before the intended use, our customer shall be solely responsible for the use. n1407 ms b8-5611 / 41301rm (ot) no.6804-1/15 LA75503V overview the LA75503V is an adjustment free vif/sif signal processing ic for pal tv/vcr. it supports 38mhz, 38.9mhz, and 39.5mhz as the if frequencies, as well as pal sound multi-sy stem (m/n, b/g, i, d/k), and contains an on-chip sound carrier trap and sound carrier bpf. to adjust the vco circu it, aft circuit, and sound filte r, 4mhz external crystal or 4mhz external signal is needed. features ? internal vco adjustment free circuit eliminating need for vco coil adjustments. ? internal sound carrier bpf and sound carrier trap enable easy configuration of pal sound multi-system at low cost. ? considerably reduces the number of required peripheral parts. ? use of digital aft eliminates problem of aft tolerance. ? package: ssop 30 (275 mil) functions ? vif amplifier ? vco adjustment free pll detection circuit ? digital aft circuit ? rf agc ? buzz canceller ? equalizer amplifier ? internal sound carrier bpf ? internal sound carrier trap ? pll-fm detector ? reference oscillation circuit monolithic linear ic for pal tv/vcr adjustment free vif/sif signal processing ic orderin g numbe r : en6804a
LA75503V no.6804-2/15 specifications maximum ratings at ta = 25 c parameter symbol conditions ratings unit maximum supply voltage v cc max 7v v16 v cc v circuit voltage v18 v cc v i30 -1 ma i17 +0.5 ma i6 -10 ma circuit current i4 -3 ma allowable power dissipation pd max ta 75 c * 550 mw operating temperature topr -20 to 70 c storage temperature tstg -55 to +150 c * mounted on a printed circuit board: 65mm 72mm 1.6mm, paper phenol. operating conditions at ta = 25 c parameter symbol conditions ratings unit recommended supply voltage v cc 5v operating voltage range v cc op 4.5 to 5.5 v electrical characteristics at ta = 25 c, v cc = 5.0v, fp = 38.9mhz ratings parameter symbol conditions min typ max unit vif block circuit current i17 64.0 73.6 ma maximum rf agc voltage v14h 8.5 9 v minimum rf agc voltage v14l collector load 30k ? vc2 = 9 v 0.3 0.7 v input sensitivity vi 33 39 45 db v agc range gr 58 db maximum allowable input vi max 92 97 db v no-signal video output voltage v4 3.3 3.6 3.9 v synchronizing signal tip voltage v4tip 1.0 1.3 1.6 v video output level v o 1.7 2.0 2.3 vp-p video signal-to-noise ratio s/n b/g 48 52 db c-s beating ic-s p/s = 10db 26 32 38 db differential gain dg vin = 80db 3 10 % differential phase dp 2 10 deg black noise threshold voltage v bth 0.7 v black noise clamp voltage v bcl 1.8 v vif input resistance ri 2.5 3.0 k ? vif input capacitance ci 3 6 pf maximum aft voltage v13h 4.3 4.7 5.0 v maximum aft voltage v13l 0 0.2 0.7 v aft tolerance 1 dfa1 f = 38.9mhz 35 70 khz aft tolerance 2 dfa2 f = 38.0mhz 35 70 khz aft tolerance 3 dfa3 f = 39.5mhz 35 70 khz aft detection sensitivity sf r l = 100k ? // 100k ? 40 80 120 mv/khz aft dead zone fda 30 60 khz apc pull-in range (u) fpu 1.5 2.0 mhz apc pull-in range (l) fpl 1.5 2.0 mhz vco maximum frequency range (u) dfu 1.5 2.0 nhz vco maximum frequency range (l) dfl 1.5 2.0 mhz vco control sensitivity 2.0 4.0 8.0 khz/mv continued on next page.
LA75503V no.6804-3/15 continued from preceding page. ratings parameter symbol conditions min typ max unit n trap1 (4.75mhz) nt1 wrt 1mhz -30 -35 db n trap2 (5.25mhz) nt2 wrt 1mhz -19 -24 db bg trap1 (5.75mhz) bt1 wrt 1mhz -27 -32 db bg trap2 (6.1mhz) bt2 wrt 1mhz -20 -25 db bg trap3 (5.85mhz) bt3 wrt 1mhz -27 -32 db i trap1 (6.25mhz) it1 wrt 1mhz -25 -30 db i trap2 (6.8mhz) it2 wrt 1mhz -15 -20 db dk trap1 (6.75mhz) dt1 wrt 1mhz -25 -30 db group delay 1 ntsc (3.0mhz) ngd1 wrt 1mhz 10 40 70 ns group delay 1-1 ntsc (3.5mhz) ngd1-1 wrt 1mhz 70 120 170 ns group delay 2 bg (4mhz) bgd2 wrt 1mhz 30 60 90 ns group delay 2-1 bg (4.4mhz) bgd2-1 wrt 1mhz 100 150 200 ns group delay 3 i (4mhz) igd3 wrt 1mhz 0 30 60 ns group delay 3-1 i (4.4mhz) igd3-1 wrt 1mhz 30 60 90 ns group delay 4 dk (4mhz) dgd4 wrt 1mhz 0 15 30 ns group delay 4-1 dk (4.4mhz) dgd4-1 wrt 1mhz 0 30 60 ns 1st sif block conversion gain vg fp = 5.5mhz, vi = 500 v 26 32 38 db sif carrier output level so vi = 10mv 100 mvrms first sif maximum input si max so 2db 106 db v first sif input resistance ris 5.0 6.0 k ? first sif input capacitance cis 3 6 pf sif block limiting sensitivity vi(lim) 46 52 58 db v fm detector output voltage v o (fm) fp = 5.5mhz, ? f = 30khz at 400hz 560 700 850 mvrms am rejection ratio amr am = 30% at 400hz 50 60 db total harmonic distortion thd fp = 5.5mhz, ? f = 30khz 0.3 1.0 % fm detector output s/n s/n(fm) 55 60 db bpf 3db bandwidth bw 100 khz pal de-emphasis pdeem fm = 3khz -3 db ntsc de-emphasis ndeem fm = 2khz -3 db pal/nt audio voltage gain difference gd 6 db others 4mhz level (during external input) x4min terminated 86 db sif system sw threshold voltage v10, v11 1.4 v if system sw th reshold resistance v12 270 k ? split/inter sw v16 0.5 v
LA75503V no.6804-4/15 package dimensions unit : mm (typ) 3191b pin assignment 1 sif input 2 fm filter 3 nc 4 1st sif out 5 nc 6 video det out 7 eq filter 8 sif agc filter 9 apc filter 10 fll filter 11 vco coil 12 vco coil 13 system sw [a] 14 system sw [b] 15 ref osc 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 fm det out fm noise filter rf agc vr sif pll filter nc filter control capacito r vif input vif input gnd v cc 1st sif input nc if agc filter rf agc out aft out to p view LA75503V sanyo : ssop30(275mil) 9.75 5.6 7.6 0.22 0.65 (0.33) 1 15 16 30 0.5 0.15 1.5max 0.1 (1.3)
LA75503V no.6804-5/15 block diagram and test circuit 1 system switch
LA75503V no.6804-6/15 test circuit 2 input impedance measuring circuit (vif, first sif input impedance) 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 1k ? 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 LA75503V 10k ? 15k ? vif input 1st sif input + 100 f to p view v cc impedance analyzer system switching ? sif system switch the sif system is switched by setting pins a (pin 13) and b (pin 14) to gnd or open. a b b/g i d/k m/n fm det level de-emphasis gnd gnd { 6db 75 s gnd open { 0db 50 s open gnd { 0db 50 s open open { 0db 50 s note: " { " indicates that the system is selected. ? if system switch 38.9mhz is selected as the if frequency by leaving pin 15 (crystal oscillation) open. 38mhz is selected by adding 220k ? between pin 15 and gnd. this device can also select 39.5mhz operation by adding a 220k ? resistor between pin 15 and v cc . ? split/inter carrier switch inter carrier is selected by setting the first sif input (pin 20) to gnd. sound trap the trapping point of the sound trap is set approximately 250khz above the sif center frequency of each mode to improve the video s/n. therefore, design using split specifications is preferable.
LA75503V no.6804-7/15 pin function pin no. pin name pin function equivalent circuit 1 sif input inputs the sif signal from the first sif output. set the input level to 90db v or lower because of the dynamic range of the internal filter. 2 fm filter this is the fm feedback filter pin. it is composed of a c and r filters. 1 f is normally used as the capacitance. if the capacitance is a low value, the audio output level is small at low frequencies. moreover, the audio output level can be made smaller by increasing the resistance connected in series. use a resistance of 3k ? or higher. 3 nc not connected. 4 1st sif out this is the first sif output. in case of inter carrier, the chroma carrier is bigger than split carrier applications, so that it is recommended to connect a filter externally. filter example 5 nc not connected. continued on next page.
LA75503V no.6804-8/15 continued from preceding page. pin no. pin name pin function equivalent circuit 6 7 video-out eq-out pin 6 is the video output pin. the eq amplifier can be thought of as shown below. therefore, the peak gain of the eq amplifier is determined by av = 1 + r/z. however, note that the LA75503V being an ic with v cc = 5v, setting too large an amplitude causes distortion in the v cc side. use so that the white level is 4v or less. 8 sif agc filter pin 8 is the sif agc filter pin. use this pin with a capacitance between 0.01 f and 0.1 f. 9 10 apc filter fll filter pin 9 is the pll detector apc filter pin. normally the following are used: r = 330 ? c1 = 0.47 f to 1 f c2 = 100pf c1 = 1 f is effective for the over-modulation characteristics. when the pll is locked, the signal passes via the path marked a in the figure, and when pll is unlocked and in weak signal, the signal passes via the path marked b in the figure. the pll loop gain can thus be switched in this manner. pin 10 is a vco automatic control fll filter pin. since it operates always on a small current, using a larger capacitance results in a slower response. normally, a capacitance between 0.47 f and 1 f is used. moreover, the control range for this pin is between about 3v to 4.7v. since this range is determined when adjusting the vco tank circuit, set the design center of l and c of vco so that the voltage of pin 10 is 3.6 v. time constant switch output out p ut continued on next page.
LA75503V no.6804-9/15 continued from preceding page. pin no. pin name pin function equivalent circuit 11 12 vco coil this is the vco tank circuit for the pll detector. use a tuning capacitance of 24pf. use l and c specifications that are accurate to 2%. also, design the l and c values so that the voltage of pin 10 is 3.6v when pll is locked while using the if center frequency. 13 14 system sw [a] system sw [b] this is the system switch pin. the transistor turns on when the pin voltage from the circuit becomes approx. 1.4v. 15 ref osc this pin can be used both as the crystal resonator pin and if switch. the 38mhz mode is selected by inserting 220k ? between pin 15 and gnd, the 38.9mhz mode by leaving the pin open, and the 39.5mhz mode by inserting 220k ? between pin 15 and v cc . 4mhz input is possible from this pin. in the case of 4mhz external input, input 86db continued on next page.
LA75503V no.6804-10/15 continued from preceding page. pin no. pin name pin function equivalent circuit 16 aft out pin 16 is the aft output pin. use external resistors of 47k ? and a filter capacitance 0.1 f. the aft circuit generates the aft voltage by comparing the signal obtained by dividing the 4mhz reference frequency with the signal obtained by dividing vco. since it uses a digital phase comparator, a dead zone exists in the aft center. waveform 17 rf agc out pin 17 is the rf agc output. rf agc max is determined by r1 and r2. rf agc min is determined by r3 and r4. capacitor c1 prevents oscillation and capacitor c2 is the rf agc filter. normally 30k ? is used for r1, but if the tuner's f/e transistor is gaas, the gate's impedance is lower, so use approx. 10k ? . comparator 18 if agc filter pin 18 is the if agc filter pin. normally, 0.01 f to 0.02 f polyester film capacitor is used. determine the impedance based on h-sag and agc speed. 19 nc not connected. continued on next page.
LA75503V no.6804-11/15 continued from preceding page. pin no. pin name pin function equivalent circuit 20 1st sif input pin 20 can be used both as the first sif in and inter/split switch pins. in the case of inter carrier, connect pin 20 to gnd. when a sound saw filter is added, the matching loss can be decreased by inserting l to neutralize the ic input capacitance and saw filter output capacitance. 21 v cc connect the decoupling capacitor as close as possible. 22 gnd 23 24 vif input pins 23 and 24 are vif input pins. to reduce the loss of signal through a saw filter, input resistors are set to 2k ? . vif amplifier has three capacitive coupling amplifiers, direct connection from a saw filter is available. continued on next page.
LA75503V no.6804-12/15 continued from preceding page. pin no. pin name pin function equivalent circuit 25 filter control capacitor internal filters (i.e. sound carrier bpf and sound carrier trap) are tuned using the capacitor connected to pin 25. a value between 0.47 f and 1 f is considered desirable taking video s/n, and am and pm noise into consideration. 26 nc not connected. 27 sif pll filter pin 27 is the sif pll filter pin. normally use the following values. r: 3k ? c1: 0.01 f c2: 1000pf large r value small r value a large r value (6k ? or lower) results in high-pass fm detection output noise. a smaller r value results in low-pass noise. continued on next page.
LA75503V no.6804-13/15 continued from preceding page. pin no. pin name pin function equivalent circuit 28 rf agc vr pin 28 is the rf agc vr pin. when this pin is connecte d to gnd, no signal is appeared on pin 6 and pin 30. output 29 fm filter pin 29 is the fm filter pin. use a capacitance between 0.01 f and 1 f. 30 fm det out pin 30 is the fm output pin. the built-in differential amplifier determines and switches the de-emphasis resistance value. pal: 5k ? 0.01 f nt: 7.5k ? 0.01 f
LA75503V no.6804-14/15 application circuit example system switch a b bg i dk mn gain 0 0 6 db 0 1 0 db 1 0 0 db 0 db 1 1 1: open 0: gnd
LA75503V ps no.6804-15/15 sanyo semiconductor co.,ltd. assumes no responsib ility for equipment failures that result from using products at values that exceed, even momentarily, rate d values (such as maximum ra tings, operating condition ranges, or other parameters) listed in products specif ications of any and all sanyo semiconductor co.,ltd. products described or contained herein. sanyo semiconductor co.,ltd. strives to supply high-qual ity high-reliability products, however, any and all semiconductor products fail or malfunction with some probabi lity. it is possible that these probabilistic failures or malfunction could give rise to acci dents or events that could endanger human lives, trouble that could give rise to smoke or fire, or accidents that could cause dam age to other property. when designing equipment, adopt safety measures so that these kinds of accidents or e vents cannot occur. such measures include but are not limited to protective circuits and error prevention c ircuits for safe design, redundant design, and structural design. upon using the technical information or products descri bed herein, neither warranty nor license shall be granted with regard to intellectual property rights or any other rights of sanyo semiconductor co.,ltd. or any third party. sanyo semiconductor co.,ltd. shall not be liable f or any claim or suits with regard to a third party's intellctual property rights which has resulted from the use of the technical information and products mentioned above. information (including circuit diagr ams and circuit parameters) herein is for example only; it is not guaranteed for volume production. any and all information described or contained herein are subject to change without notice due to product/technology improvement, etc. when designing equi pment, refer to the "delivery specification" for the sanyo semiconductor co.,ltd. product that you intend to use. in the event that any or all sanyo semiconductor c o.,ltd. products described or contained herein are controlled under any of applicable local export control laws and regulations, such products may require the export license from the authorities conc erned in accordance with the above law. no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying and recording, or any in formation storage or retrieval system, or otherwise, without the prior written consent of sanyo semiconductor co.,ltd. this catalog provides information as of november, 2007. specifications and inform ation herein are subject to change without notice.

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